求大神解答~~~~~~
LIBRARY IEEE;USE IEEE.std_logic_1164.ALL;
USE IEEE.std_logic_arith.ALL;
USE IEEE.std_logic_signed.ALL;
ENTITY dispIS
PORT(din :IN integer RANGE 20 DOWNTO 0;
clk :IN std_logic;
rst :IN std_logic;
led_buy_inner :IN std_logic;
led_cancel_inner:IN std_logic;
led_buy :OUT std_logic;
led_cancel :OUT std_logic;
led1 :OUT std_logic_vector(6 DOWNTO 0);
led2 :OUT std_logic_vector(6 DOWNTO 0));
END disp;
ARCHITECTURE Behavioral OF disp IS
SIGNALdin10,din1 : std_logic_vector(3 DOWNTO 0);
SIGNALcounter : std_logic_vector (3 DOWNTO 0);
SIGNALled_ok_flag : std_logic;
SIGNALled_cancel_flag : std_logic;
SIGNALled_ok_inner : std_logic;
COMPONENT disp7
PORT (din : IN std_logic_vector(3 DOWNTO 0);
led : OUT std_logic_vector(6 DOWNTO 0));
END COMPONENT;
BEGIN
uut1:disp7 PORT MAP(
din => din10,
led => led1);
uut2:disp7 PORT MAP(
din => din1,
led => led2);
PROCESS(din)
BEGIN
din1 <=conv_std_logic_vector((din mod 10),4);
din10 <=conv_std_logic_vector(((din-(din mod 10))/10),4);
END PROCESS;
PROCESS(clk)
BEGIN
IF (rising_edge(clk)) THEN
IF (led_ok_flag ='1' OR led_cancel_flag ='1') THEN
counter <=counter+1;
ELSE
counter <=(OTHERS =>'0');
END IF;
END IF;
IF (rst='1') THEN
led_ok_flag <='0';
led_cancel_flag <='0';
counter <=(OTHERS =>'0');
ELSE
IF (rising_edge(led_ok_inner)) THEN
led_ok_flag <='1';
ELSIF (counter ="111111111111") THEN
led_ok_flag <='0';
END IF;
IF (rising_edge(led_cancel_inner)) THEN
led_cancel_flag <='1';
ELSIF (counter ="111111111111") THEN
led_cancel_flag <='0';
END IF;
IF (counter(10) ='1') THEN
IF (led_ok_flag ='1') THEN
led_buy <='1';
END IF;
IF (led_cancel_flag ='1') THEN
led_cancel <='1';
END IF;
END IF;
END IF;
END PROCESS;
END Behavioral;
显示的错误为66行附近的错误，新手上路真是不知道该怎么办，求各位路过大侠解答~~~~~~~ 66行是哪行，我数了数你的代码不过70行
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