SPARTAN6 FIFO CORE编写问题
ERROR:NgdBuild:604 - logical block'Inst_group_UART_a/Inst_UART_CHANNEL_0/Inst_Q_RAM' with type
'fifo_generator_v6_2' could not be resolved. A pin name misspelling can cause
this, a missing edif or ngc file, case mismatch between the block name and
the edif or ngc file name, or the misspelling of a type name. Symbol
'fifo_generator_v6_2' is not supported in target 'spartan6'.
本人用SPARTAN6里面的CORE编译工具编译了一个FIFO，但是综合布线的时候出现上述错误，各位请帮助看看哪的问题，或者给点资料能找问题的。
求解答～！
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