乘法器实现
module multy(
input dx,
input dy,
output dp
);
wire dyx0;
assign dyx0=dx&dy;
assign dyx0=dx&dy;
assign dyx0=dx&dy;
assign dyx0=dx&dy;
wire dyx1;
assign dyx1=dx&dy;
assign dyx1=dx&dy;
assign dyx1=dx&dy;
assign dyx1=dx&dy;
wire dyx2;
assign dyx2=dx&dy;
assign dyx2=dx&dy;
assign dyx2=dx&dy;
assign dyx2=dx&dy;
wire dyx3;
assign dyx3=dx&dy;
assign dyx3=dx&dy;
assign dyx3=dx&dy;
assign dyx3=dx&dy;
wire ader010,ader011,ader012,ader013,ader014;
assign ader010=dyx0+1'b0;
assign ader011=dyx0+dyx1+ader010;
assign ader012=dyx0+dyx1+ader011;
assign ader013=dyx0+dyx1+ader012;
assign ader014= dyx1+ader013;
wire adr01;
assign adr01={
ader014,
ader014,
ader013,
ader012,
ader011,
ader010
};
wire ader230,ader231,ader232,ader233,ader234;
assign ader230=dyx2+1'b0;
assign ader231=dyx2+dyx3+ader230;
assign ader232=dyx2+dyx3+ader231;
assign ader233=dyx2+dyx3+ader232;
assign ader234= dyx3+ader233;
wire adr23;
assign adr23={
ader234,
ader234,
ader233,
ader232,
ader231,
ader230
};
wire rel0,rel1,rel2,rel3,rel4,rel5,rel6,rel7,rel8;
assign rel0=adr01+1'b0;
assign rel1=adr01+1'b0;
assign rel2=adr01+adr23+rel1;
assign rel3=adr01+adr23+rel2;
assign rel4=adr01+adr23+rel3;
assign rel5=adr01+adr23+rel4;
assign rel6= adr23+rel5;
assign rel7= adr23+rel6;
assign dp={
rel7,
rel7,
rel6,
rel5,
rel4,
rel3,
rel2,
rel1,
rel0
};
endmodule
页:
[1]
