[求助]verilog语法问题!!!!!!关于sha256计算~~~~~~~~~~~~~~~~
以下是本人写的verilog模块,用于计算sha256中的一个块维基百科的伪代码表述:
http://zh.wikipedia.org/wiki/SHA ... 4.E7.AE.97.E6.B3.95
编译器: ModelSim Se10.1a
编译环境: win xp sp3
提示错误:
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(115): near "genvar": syntax error, unexpected genvar
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(116): (vlog-2730) Undefined variable: 'i'.
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(116): near ")": syntax error, unexpected ')', expecting ';'
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(120): near "endgenerate": syntax error, unexpected endgenerate
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(123): near ")": syntax error, unexpected ')', expecting ';'
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(131): near "endgenerate": syntax error, unexpected endgenerate
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(144): near ")": syntax error, unexpected ')', expecting ';'
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(148): (vlog-2730) Undefined variable: 's0'.
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(149): near "maj": syntax error, unexpected IDENTIFIER, expecting ';'
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(189): (vlog-2730) Undefined variable: 'rightrotate_32bit'.
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(189): (vlog-2730) Undefined variable: 'n'.
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(189): (vlog-2730) Undefined variable: 'data'.
** Error: E:\modeltech_10.1a\my project\sha-256-calcblock.v(191): near "endfunction": syntax error, unexpected endfunction
代 码:
module sha256calcblock(input w, output reg hash);
reg k256 ;
reg hh ;
reg ww ;
initial
fork
k256 = 32'h428a2f98;
k256 = 32'h71374491;
k256 = 32'hb5c0fbcf;
k256 = 32'he9b5dba5;
k256 = 32'h3956c25b;
k256 = 32'h59f111f1;
k256 = 32'h923f82a4;
k256 = 32'hab1c5ed5;
k256 = 32'hd807aa98;
k256 = 32'h12835b01;
k256 = 32'h243185be;
k256 = 32'h550c7dc3;
k256 = 32'h72be5d74;
k256 = 32'h80deb1fe;
k256 = 32'h9bdc06a7;
k256 = 32'hc19bf174;
k256 = 32'he49b69c1;
k256 = 32'hefbe4786;
k256 = 32'h0fc19dc6;
k256 = 32'h240ca1cc;
k256 = 32'h2de92c6f;
k256 = 32'h4a7484aa;
k256 = 32'h5cb0a9dc;
k256 = 32'h76f988da;
k256 = 32'h983e5152;
k256 = 32'ha831c66d;
k256 = 32'hb00327c8;
k256 = 32'hbf597fc7;
k256 = 32'hc6e00bf3;
k256 = 32'hd5a79147;
k256 = 32'h06ca6351;
k256 = 32'h14292967;
k256 = 32'h27b70a85;
k256 = 32'h2e1b2138;
k256 = 32'h4d2c6dfc;
k256 = 32'h53380d13;
k256 = 32'h650a7354;
k256 = 32'h766a0abb;
k256 = 32'h81c2c92e;
k256 = 32'h92722c85;
k256 = 32'ha2bfe8a1;
k256 = 32'ha81a664b;
k256 = 32'hc24b8b70;
k256 = 32'hc76c51a3;
k256 = 32'hd192e819;
k256 = 32'hd6990624;
k256 = 32'hf40e3585;
k256 = 32'h106aa070;
k256 = 32'h19a4c116;
k256 = 32'h1e376c08;
k256 = 32'h2748774c;
k256 = 32'h34b0bcb5;
k256 = 32'h391c0cb3;
k256 = 32'h4ed8aa4a;
k256 = 32'h5b9cca4f;
k256 = 32'h682e6ff3;
k256 = 32'h748f82ee;
k256 = 32'h78a5636f;
k256 = 32'h84c87814;
k256 = 32'h8cc70208;
k256 = 32'h90befffa;
k256 = 32'ha4506ceb;
k256 = 32'hbef9a3f7;
k256 = 32'hc67178f2;
hh = 32'h6a09e667;
hh = 32'hbb67ae85;
hh = 32'h3c6ef372;
hh = 32'ha54ff53a;
hh = 32'h510e527f;
hh = 32'h9b05688c;
hh = 32'h1f83d9ab;
hh = 32'h5be0cd19;
join
reg a;
reg b;
reg c;
reg d;
reg e;
reg f;
reg g;
reg h;
always @(w)
begin
genvar i, s0, s1, maj, t1, t2, ch;
generate for(i = 0; i < 16 ; i = i + 1)
fork
ww <= w;
join
endgenerate
generate for(i = 16; i < 63 ; i = i + 1)
fork
//s0 = rightrotate_32bit(ww , 7) ^ rightrotate_32bit(ww , 18) ^ (ww >> 3);
//s1 = rightrotate_32bit(ww , 17) ^ rightrotate_32bit(ww , 19) ^ (ww >> 10);
//ww = ww + s0 + ww + s1;
ww = ww + rightrotate_32bit(ww , 7) ^ rightrotate_32bit(ww , 18) ^ (ww >> 3) + ww + rightrotate_32bit(ww , 17) ^ rightrotate_32bit(ww , 19) ^ (ww >> 10);
join
endgenerate
fork
a = hh
b = hh
c = hh
d = hh
e = hh
f = hh
g = hh
h = hh
join
generate for(i = 0; i < 63 ; i = i + 1)
begin
fork
begin
s0 = rightrotate_32bit(a , 2) ^ rightrotate_32bit(a , 13) ^ rightrotate_32bit(a , 22)
maj = (a & b) ^ (a & c) ^ (b & c)
t2 = s0 + maj
end
begin
s1 = rightrotate_32bit(e , 6) ^ rightrotate_32bit(e , 11) ^ rightrotate_32bit(e , 25)
ch = (e & f) ^ ((~ e) & g)
t1 = h + s1 + ch + k + w
end
join
fork
h = g
g = f
f = e
e = d + t1
d = c
c = b
b = a
a = t1 + t2
join
end
endgenerate
fork
hh = hh + a
hh = hh + b
hh = hh + c
hh = hh + d
hh = hh + e
hh = hh + f
hh = hh + g
hh = hh + h
join
end
endmodule
function rightrotate_32bit(input data, input n);
begin
rightrotate_32bit = (data[(31 - n):0] << (32 - n)) | ( data >> n);
end
endfunction
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