MWR R&D - FPGA Design Senior Engineer 诺基亚西门子
发布日期： 2010-04-13 工作地点： 上海 招聘人数： 若干工作年限： 五年以上 语言要求： 英语 熟练 学 历： 本科
职位描述
MWR R&D - FPGA Design Senior Engineer
Key Responsibilities:
- Participate in outlining product architecture definition and derive the functional specification for FPGA functionality level.
- Work as the technical point of contact on the FPGA area.
Job Requirements:
- Be able to generate block level definitions and FPGA requirements for the design team
- Complete understanding of the FPGA design flow.
- Knowledge of FPGA-Design and Formal Verification tools. Good VHDL experience
- With TDM or Packet based FPGA design experience more than 2 years.
Education/Skills:
- Bachelor/Master of Science (Electrical Engineering)
- >5 years working experience in the related area
- Fluent English in both speaking and writing 6
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