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预览 HDB3编译码试验	zxopenwgb 2016-9-25	1654	zxopenwgb 2016-9-26 09:39
预览 Modelsim_10.1c_crack	zxopenwgb 2016-9-25	1865	zxopenwgb 2016-9-26 09:39
预览 NC-Verilog Simulator实验	zxopenwgb 2016-9-25	1697	zxopenwgb 2016-9-26 09:38
预览 Quartus_II_Timing	zxopenwgb 2016-9-25	1814	zxopenwgb 2016-9-26 09:38
预览 Verilog HDL书稿解密	zxopenwgb 2016-9-25	1623	zxopenwgb 2016-9-26 09:38
预览 verilog代码规范	zxopenwgb 2016-9-25	11071	zxopenwgb 2016-9-26 09:37
预览 train	zxopenwgb 2016-9-25	1576	zxopenwgb 2016-9-26 09:36
预览 Verilog	zxopenwgb 2016-9-25	11035	zxopenwgb 2016-9-26 09:36
预览 Verilog_Reference_Guide	zxopenwgb 2016-9-25	1749	zxopenwgb 2016-9-26 09:35
预览 Vivado 简明教程	zxopenwgb 2016-9-25	11044	zxopenwgb 2016-9-26 09:35
预览 iic_slave	zxopenwgb 2016-9-21	1628	zxopenwgb 2016-9-22 10:04
预览 systemverilog功能与验证-钟文枫-原书代码（部分）	zxopenwgb 2016-9-21	1788	zxopenwgb 2016-9-22 10:03
预览 Verilog HDL程序设计实例详解.	zxopenwgb 2016-9-21	1803	zxopenwgb 2016-9-22 10:03
预览 Vivado 简明教程	zxopenwgb 2016-9-21	1794	zxopenwgb 2016-9-22 10:02
预览 Xilinx FPGA权威设计指南 Vivado 2014集成开发环境	zxopenwgb 2016-9-21	11025	zxopenwgb 2016-9-22 10:02
预览 Digital Design and Computer Architecture	zxopenwgb 2016-9-21	1663	zxopenwgb 2016-9-22 09:59
预览 slimbus原创中文解析	zxopenwgb 2016-9-21	1881	zxopenwgb 2016-9-22 09:59
预览 SystemVerilog与功能验证	zxopenwgb 2016-9-21	1645	zxopenwgb 2016-9-22 09:59
预览 VHDL数字电路设计教程	zxopenwgb 2016-9-21	21014	zxopenwgb 2016-9-22 09:57
预览 Digital Design and Computer Architecture	zxopenwgb 2016-9-21	2790	zxopenwgb 2016-9-22 09:57
预览 XILINX ISE 14.7 迅雷下载地址	zxopenwgb 2016-9-21	2885	zxopenwgb 2016-9-22 09:57
预览 SystemVerilog for Verification(3rd)	zxopenwgb 2016-9-18	41195	zxopenwgb 2016-9-21 09:38
预览完美时序--all	zxopenwgb 2016-9-18	61877	zxopenwgb 2016-9-21 09:32
预览 modelsim-win32-10.1c-se	zxopenwgb 2016-9-18	51145	zxopenwgb 2016-9-21 09:27
预览小脚丫FPGA开发板二代 VS 小脚丫FPGA开发板一代（采用Lattice的EDA工具Diamond）	lcytms 2016-9-20	51853	zxopenwgb 2016-9-21 09:22
预览 MITvhdl	zxopenwgb 2016-9-18	2870	芙蓉王 2016-9-20 10:37
预览 vhdl-tutorial	zxopenwgb 2016-9-18	2935	zxopenwgb 2016-9-20 09:51
预览雾盈FPGA笔记汇总目录 ...2	雾盈 2016-8-28	127046	zxopenwgb 2016-9-20 09:51
预览 Perl语言入门第4版	zxopenwgb 2016-9-18	31100	zxopenwgb 2016-9-20 09:47
预览 VHDL数字电路设计教程	zxopenwgb 2016-9-18	31383	zxopenwgb 2016-9-20 09:45
预览 Digital[1].Logic.And.Microprocessor.Design.With.VHDL	zxopenwgb 2016-9-18	3732	zxopenwgb 2016-9-20 09:45
预览 Active Serial Remote System	zxopenwgb 2016-9-18	3853	zxopenwgb 2016-9-20 09:44
预览 VCS_Lab_Guide	zxopenwgb 2016-9-18	3835	zxopenwgb 2016-9-20 09:44
预览芯天地verilog硬件描述建模篇.pdf	zxopenwgb 2016-9-17	41293	zxopenwgb 2016-9-20 09:43
预览 Verilog基本电路设计指导书.pdf	zxopenwgb 2016-9-17	21194	zxopenwgb 2016-9-20 09:40
预览 SystemVerilog Verification UVM 1.1	zxopenwgb 2016-9-17	31032	zxopenwgb 2016-9-20 09:36
预览 ModelSimSetup-13.1.0.162.haozip	zxopenwgb 2016-9-17	41131	zxopenwgb 2016-9-20 09:36
预览 ug873-zynq-ctt	zxopenwgb 2016-9-18	1586	zxopenwgb 2016-9-18 15:45
预览 CMOS VLSI design- Weste N.H.E., Harris D. 3ed., Pearson AW, 2005.part01	zxopenwgb 2016-9-18	1592	zxopenwgb 2016-9-18 15:43
预览 vivado_2016.2_lic	zxopenwgb 2016-9-18	01068	zxopenwgb 2016-9-18 10:57