资深FPGA工程师( Senior FPGA Engineer) 普然通讯技术（上海）有限公司

发布日期：        2010-05-17        工作地点：        上海-浦东新区        招聘人数：        1
工作年限：        三年以上        语言要求：        英语        学    历：        本科
职位描述
Responsibility:
ASIC and/or FPGA design and verification Porting ASIC code to FPGA platform.

Required Skills:
MS/BS in Electronic or Computer Science Engineering is required Expert in FPGA theory, architecture and design flow Expert in verilog or VHDL Familiar with FPGA EDA tools, such as synplify, ISE, QuartusII Expert in Xilinx product, Virtex, Spartan device More than 3 years experience in design and verify FPGA.
联系方式
电子邮箱：        jobs@opulan.com