Cyclone II 电源特性和电源管脚

1/2 the Static Power 1/2 the Dynamic Power Zero Inrush Current Hot-Socketing Support Fewer Required Power Supplies

The Cyclone II Total Advantage

#1 in Low Power—Half the power of competing 90-nm low-cost FPGAs.

#1 in Price—No price premiums for lower power. Competing 90-nm low-cost FPGAs have a price premium to obtain lower power devices.

#1 in Performance—60 percent higher performance than competing 90-nm low-cost FPGAs. Obtain low power and high performance from a single FPGA.

另外Cyclone还有防浪涌，热插拔，上电复位，PLL电源，以及其他IO方面的电源特性。

比如：

The IOE registers in each I/O block share the same source for clear or preset. You can program preset or clear for each individual IOE, but both features cannot be used simultaneously. You can also program the

registers to power up high or low after configuration is complete. If programmed to power up low, an asynchronous clear can control the registers. If programmed to power up  high, an asynchronous preset can

control the registers.

This feature pr events the inadvertent activation of another device’s active-low input upon power up. If one register in an IOE uses a preset or clear signal then all registers in the IOE must use that same signal if

they require preset or clear. Additionally a synchronous reset signal is availabl e for the IOE registers.


Cyclone 电源管脚：

VCCINT：内核电压。通常与FPGA芯片所采用的工艺有关，例如130nm工艺为1.5V，90nm工艺为1.2V。

VCCIO：端口电压。一般为3.3V，还可以支持选择多种电压，如1.8V、1.5V等。

VREF：参考电压。

VCC_PLL：锁相环管脚电压，直接连VCCIO。

VCCA_PLL：锁相环模拟电压，一般通过滤波器接到VCCINT上。

GNDA_PLL：锁相环模拟地。

GNDD_PLL：锁相环数字地。

JTAG  AS   VCC电源

Cyclone II 电源特性和电源管脚

Cyclone II 电源特性和电源管脚