FPGA design and validation engineer 武曲芯电子科技（上海）有限公司

发布日期：        2010-05-05        工作地点：        上海-徐汇区        招聘人数：        若干
工作年限：        三年以上        语言要求：        英语 熟练        学    历：        本科
职位描述
Job Description :
The candidate will be responsible for FPGA validation of whole SOC and leading the whole FPGA verification flow, including specification, integration , implementation and board level debugging.

Qualification :
1.Should have good understanding of the whole FPGA design flow, i.e, RTL coding, simulation, synthesis, timing closure and in-system debugging;
2.Should be proficient in all aspects of FPGA design, have an in-depth familiarity with Altera stratix series device and know well about synthesis tools like synplify and quartus II.
3.Have good background in arm based embedded system, specially video applcaition.
4.Capability of make rapidly method to trace issues;
5.Bachelor degree or above, have 3+ years dedicated experiences of FPGA design.
6.Capability to take challenge and good team work capabilities and communication skills.

联系方式
电子邮箱：        hr@nemochips.com