|
1342| 0
|
用quartus ii生成一个pll,输出频率什么的都正常,但就locked不正常,他一直是高阻态 |
/1
|小黑屋|手机版|Archiver|fpga论坛|fpga设计论坛
( 京ICP备20003123号-1 )
GMT+8, 2025-12-20 13:28 , Processed in 0.061223 second(s), 20 queries .
Powered by Discuz! X3.4
Copyright © 2001-2023, Tencent Cloud.