上海柏科猎头代招：法资通信公司招募FPGA,DSP,CPU/L2 RealTime Engineer

职位薪资较为丰厚（年薪15~30w），可谈，base在上海。有意者欢迎电话、邮件或QQ联系！
电话：021-61471500-8035
邮箱：hesimin0119@163.com
QQ：576814212
Position: RealTime Engineer -- CPU/L2 Design
Job Description:
- Responsible for the Real time CPU software design, simulation and maintenance in Wireless system.
- Carry out the assigned tasks and report progress to project manager.
- Coding, verification, and test on board.
- If demanded, participate in modem integration and system integration.
- Solve troubles in product development, lab test and field test.
Candidate Requirement:
- Education background: Master
- Major in: Telecommunication, Computer Science, Software Engineering, Electronic Engineering, or related
- Strong Linux/Unix or Vxworks, C/C++ programming experiences.
- following background will be a plus: GSM, WCDMA, WiMax, LTE or OFDM product development experience, with strong Scheduler knowledge, and Radio Resource Management (MAC/RLC) algorithm development & validation experience
- Following background will be a plus: Experience in L1 layer or device driver / BSP programming is preferred, and experience in kernel debugging of real time OS is preferred.
- Language ability: English, good command of both written and oral
- Other requirements: communication skill, teamwork, Passionate on software development

RealTime Engineer -- DSP Design
（该职位需要有LTE, GSM, WCDMA的baseband物理层DSP开发经验哟（手机或者基站开发都OK)。）
Job description :
Responsible for the DSP design, simulation and maintenance in Wireless system.
Carry out the assigned tasks and report progress to project manager.
Take charge of project analysis and DSP chip select.
Coding, verification, and test on board.
Solve troubles in product development.
Requirement:
Good knowledge of Wireless Communication systems and good understanding of telecom industry.
2+ working years for Freescale DSP (8156, 8157 prefer), or TI DSP C64x.
2+ working years for DSP drivers (SRIO etc).
Wireless link level simulation knowledge with Matlab or C language is a plus.
Education background: Bachelor or above. Major in electronic engineering, telecommunication, computer science, or related
Good interpersonal skills, communication, team work.
Language ability: English, good, both written and oral, CET-6.
Other requirements: Capability to adapt rapidly in a challenging job environment; team work capabilities

RealTime Engineer FPGA design
（该职位需要有LTE, GSM, WCDMA等产品FPGA或ASIC, SOC开发经验，对于VHDL, Verlog十分熟悉哟）
Responsibilities:
Responsible for FPGA design, development and verification in Wireless baseband system.
Take charge of project analysis and FPGA chip select.
Verification and test on board.
Support and solve problems in system test.
Requirements:
Good knowledge of Wireless Communication systems.
Experience on baseband protocol and algorithm is a plus.
Excellent knowledge of digital circuit, logical design and timing analysis.
2+ years with VHDL/Verilog programming in FPGA.
Familiar with Modelsim, ISE and others necessary EDA tools.
Familiar with tcl / perl, familiar with Linux.
Language ability: English, good, both written and oral.