用状态机设计的串行数据接收器，怎么仿真都不对

LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY receiver IS
PORT ( din, clk, rst: IN BIT;
data: OUT BIT_VECTOR (6 DOWNTO 0);
err, data_valid: OUT BIT);
END receiver;
ARCHITECTURE rtl OF receiver IS
type state is (ready, sampling, parity, checkend, mistake);
signal pr_state, nx_state: state;
begin
-----------------------
PROCESS (rst, clk)
BEGIN
IF (rst='1') THEN
pr_state <= ready;
ELSIF (clk'EVENT AND clk='1') THEN
pr_state <= nx_state;
END IF;
end process;
-----------------------
process(din, pr_state)
VARIABLE reg: BIT_VECTOR (10 DOWNTO 0);
variable temp: bit;
variable count: integer range 0 to 10;
begin
case pr_state is
when ready =>
err<='0';
data_valid<='0';
-- count:=0;
-- reg := (reg'RANGE => '0');
-- temp := '0';
if (din='1') then
count:=0;
  reg := (reg'RANGE => '0');
temp := '0';
  reg(count) := '1';
  nx_state<= sampling;
elsif (din='0') then
  nx_state<=ready;
end if;
when sampling =>
err<='0';
data_valid<='1';
count:=count+1;
if (count<10) then
  reg(count):= din;  
  nx_state<= sampling;
elsif (count=10) then
nx_state<= parity;
end if;
when parity =>
err<='0';
data_valid<='1';
temp := (reg(1) XOR reg(2) XOR reg(3) XOR
reg(4) XOR reg(5) XOR reg(6) XOR
reg(7) XOR reg(8)) OR NOT reg(9);
err <= temp;
if (temp='1') then nx_state<= mistake;
else nx_state<= checkend;
end if;
when checkend =>
if(reg(10)='1') then
err<='0';
data_valid<='1';
data<= reg(7 downto 1);
nx_state<=ready;
else nx_state<= mistake;
end if;
when mistake =>
err<='1';
data_valid<='0';
nx_state<=mistake;
when others=>null;
end case;
end process;
end rtl;
时序仿真不对。而且诡异的是，quartus5.0和6。0居然仿真出来的结果也不同，好奇怪啊。望各位指教。count这个变量在仿真时，5。0中出不来，6。0中，count的值为何是在一个时钟内变化，而不是我想象中的一个时钟变一次呢？
多谢

问题出在：<br>
when sampling =&gt;<br>
&nbsp; &nbsp;err&lt;='0';<br>
&nbsp; &nbsp;data_valid&lt;='1';<br>
&nbsp; &nbsp;count:=count+1; <br>
&nbsp; &nbsp;if (count&lt;10) then<br>
&nbsp; &nbsp; reg(count):= din;&nbsp; &nbsp; <br>
&nbsp; &nbsp; nx_state&lt;= sampling;<br>
&nbsp; &nbsp;elsif (count=10) then<br>
&nbsp; &nbsp;nx_state&lt;= parity;<br>
&nbsp; &nbsp;end if;<br>
&nbsp;&nbsp;when parity <br>
-----<br>
应为你的进程process(din, pr_state)的敏感信号只有din, pr_state,也就是只有<br>
din和pr_state的&ldquo;变化&rdquo;才能触发进程。<br>
而nx_state &lt;= smpling，因为状态原来就是"smpling",并不能触发触发进程。

查看一下count的类型，可能需要付初值