VHDL 实现正旋信号发生器 仿真总是出现问题

VHDL 实现正旋信号发生器 仿真总是出现问题
library error primaryunit "lpmconponent" denote prefix "lpm"must exit in the library
这个库文件 没找到 还有不知道怎么利用L PM _ROM 核预置正弦查找表在FPGA 上

下面是程序  
各位帮忙看一下 3Q!
还有
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL ;
LIBRARY LPM;
USE LPM.LPMCOMPONENTS.ALL;
ENTITY ddsc IS
GENERIC(
freq_width: INTEGER :=32;
phase_width : INTEGER :=12;
adder_width : INTEGER :=32;
romad_width : INTEGER :=10;
rom_d_width : INTEGER :=10
);
PORT(
clk : IN STD_LOGIC;
freqin : IN STD_LOGIC_VECTOR(freq_width-1 DOWNTO 0) ;
ddsout : OUT STD_LOGIC_VECTOR(rom_d_width-1 DOWNTO 0));
END ENTITY ddsc;
ARCHITECTURE behave OF ddsc IS
SIGNAL acc:STD_LOGIC_VECTOR(adder_width-1 DOWNTO 0);
SIGNAL romaddr :STD_LOGIC_VECTOR(romad_width-1 DOWNTO 0) ;
BEGIN
process (clk)
BEGIN
IF (clk'event and clk ='1') THEN
acc<=acc+freqin;
END IF;
END PROCESS;
romaddr<=acc(phase_width-1 downto phase_width-romad_width) ;
i_rom :lpm_rom
GENERIC MAP (
Lpm_width=>rom_d_width,
Lpm_widthad=>romad_width,
Lpm_addreaa_control=>"NREGISTERED",
Lpm_outdata=>"EGISTERED",
Lpm_file=>"sin_rom.mif")
PORT MAP(
outclock=>clk,
ddress=>romaddr,
q=>ddsout);
END ARCHITECTURE behave;

首先， USE LPM.LPMCOMPONENTS.ALL; 应该写成 USE LPM.LPM_COMPONENTS.ALL;<br>
<br>
其次，LPM_ROM在库中是按如下形式定义的，映射时要书写正确component LPM_ROM<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;generic (LPM_WIDTH&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : natural;&nbsp; &nbsp; -- MUST be greater than 0<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_WIDTHAD&nbsp; &nbsp; &nbsp; &nbsp; : natural;&nbsp; &nbsp; -- MUST be greater than 0<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_NUMWORDS&nbsp; &nbsp; &nbsp; &nbsp; : natural := 0;<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_ADDRESS_CONTROL : string := "REGISTERED";<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_OUTDATA&nbsp; &nbsp; &nbsp; &nbsp; : string := "REGISTERED";<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_FILE&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : string;<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_TYPE&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : string := L_ROM;<br>
&nbsp; &nbsp; &nbsp; &nbsp; INTENDED_DEVICE_FAMILY&nbsp;&nbsp;: string := "UNUSED";<br>
&nbsp; &nbsp; &nbsp; &nbsp; LPM_HINT&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : string := "UNUSED");<br>
&nbsp; &nbsp;&nbsp; &nbsp;port (ADDRESS&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : in STD_LOGIC_VECTOR(LPM_WIDTHAD-1 downto 0);<br>
&nbsp; &nbsp; &nbsp; &nbsp; INCLOCK&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : in STD_LOGIC := '0';<br>
&nbsp; &nbsp; &nbsp; &nbsp; OUTCLOCK &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : in STD_LOGIC := '0';<br>
&nbsp; &nbsp; &nbsp; &nbsp; MEMENAB &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : in STD_LOGIC := '1';<br>
&nbsp; &nbsp; &nbsp; &nbsp; Q &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; : out STD_LOGIC_VECTOR(LPM_WIDTH-1 downto 0));<br>
end component;最后，只要你的sin_rom.mif文件按要求写好了，综合适配下载工具就会自动利用L PM _ROM 核预置正弦查找表在FPGA 上。

我做过，没有什么，你可以采用原理图也行的阿

不用DA转换芯片也能产生正弦信号吗？

恩  很好  谢谢楼主