MAXPLUS II编译时LOOP语句的使用

在PROCESS中使用EXIT语句可以吗？如下例
lp1:　FOR　i IN　0　TO　7　LOOP
    IF inp(i)='1' THEN inp(i )<='0';
    ELSE inp(i)<='1';EXIT lp;
   END IF;
END LOOP;
可使用MAXPLUS II编译时为什么总出错？

好像exit只能跳出本循环语句lp1

谢谢!<br>
我是想退出LP1，但问题是编译时给出如下的错误信息：<br>
&nbsp;&nbsp;Unsupported feature error:a next or an exit statement is supported only in an uncomditional loop.<br>
我不明白是MAXPLUS本来就不支持这种写法，还是我的MAXPLUSII有问题？

lp1:　FOR　i IN　0　TO　7　LOOP<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; IF inp(i)='1' THEN inp(i )&lt;='0';<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ELSE inp(i)&lt;='1';&nbsp;&nbsp;EXIT lp1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;END IF;<br>
&nbsp;&nbsp;END LOOP;<br>
不是你的防真器出错你的exit后面应该是lp1，那样你只执行一次循环，你想执行什么功能啊<br>
如果想跳出本次循环那就用关键字next。

想实现补码的转换，实际上主要是想看看LOOP语句的用法。源代码全文如下：<br>
LIBRARY IEEE;<br>
USE IEEE.Std_logic_1164.ALL;<br>
ENTITY inve IS<br>
&nbsp; &nbsp; &nbsp; &nbsp; PORT(inp:IN Std_logic_vector(7 DOWNTO 0);<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; qout:OUT Std_logic_vector(7 DOWNTO 0));<br>
END inve;<br>
ARCHITECTURE str OF inve IS<br>
BEGIN<br>
<br>
PROCESS(inp)<br>
&nbsp; &nbsp; VARIABLE&nbsp;&nbsp;n_inp:std_logic_vector(7 DOWNTO 0);<br>
BEGIN<br>
&nbsp; &nbsp;&nbsp;&nbsp;n_inp:=inp;<br>
&nbsp; &nbsp; IF (inp(7)='1') THEN <br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; FOR I IN 7 DOWNTO 0 LOOP<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; n_inp(I):=NOT n_inp(I);<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; END LOOP;&nbsp; &nbsp; &nbsp; &nbsp; --最高位为&lsquo;1&rsquo;，取反<br>
Loop1:FOR I IN 0 TO 7 LOOP<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; IF (n_inp(I)='1' )THEN n_inp(I):='0';<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; ELSE n_inp(I):='1';&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp;&nbsp; &nbsp;EXIT loop1;<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; END IF;<br>
&nbsp; &nbsp;&nbsp; &nbsp;END LOOP;&nbsp; &nbsp; &nbsp; &nbsp; --末位加&lsquo;1&rsquo;<br>
&nbsp; &nbsp;END IF;<br>
&nbsp; &nbsp; &nbsp; &nbsp; qout&lt;=n_inp;<br>
END PROCESS;<br>
END str;<br>
<br>
谢谢指教!!!

EXIT loop1;你的循环标志号要和前面的一样<br>
<br>
LIBRARY IEEE;<br>
USE IEEE.Std_logic_1164.ALL;<br>
ENTITY inve IS<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbspORT(inp:IN Std_logic_vector(7 DOWNTO 0);<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; qout:OUT Std_logic_vector(7 DOWNTO 0));<br>
END inve;<br>
ARCHITECTURE str OF inve IS<br>
BEGIN<br>
<br>
PROCESS(inp)<br>
&nbsp; &nbsp; VARIABLE&nbsp;&nbsp;n_inp:std_logic_vector(7 DOWNTO 0);<br>
BEGIN<br>
&nbsp; &nbsp;&nbsp;&nbsp;n_inp:=inp;<br>
&nbsp; &nbsp; IF (inp(7)='1') THEN <br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; FOR I IN 7 DOWNTO 0 LOOP<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;n_inp(I):=NOT n_inp(I);<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; END LOOP;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;--最高位为&lsquo;1&rsquo;，取反<br>
Loop1:FOR I IN 0 TO 7 LOOP<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; IF (n_inp(I)='1' )THEN n_inp(I):='0';<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ELSE n_inp(I):='1'; EXIT Loop1;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; <br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;END IF;<br>
&nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; &nbsp; <br>
&nbsp; &nbsp;&nbsp; &nbsp;END LOOP;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;--末位加&lsquo;1&rsquo;<br>
&nbsp; &nbsp;END IF;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;qout&lt;=n_inp;<br>
END PROCESS;<br>
END str;<br>
这样就可以了

不过你这个补码程序有错误！！完成不了补码功能，自己找找呵呵<br>
对你有好处！！