如何产生300hz的三相方波

如何产生300hz的三相方波

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity test is
port
(
rst:instd_logic;-- 高电平有效
clk:in std_logic;-- 输入时钟1.8KHz
oabc utstd_logic_vector(2 downto 0)-- 从高位到低位分别对应于A、B、C三相输出
);
end test;

architecture bhv of test is

signalcounter:std_logic_vector(2 downto 0);

begin
process(rst,clk)
begin
if rst= '1' then
counter<="000";
elsif clk'event and clk = '1' then
if counter = "101" then
counter<="000";
else
counter<=counter + 1;
end if;
end if;
end process;

process(rst,clk,counter)
begin
if rst = '1' thenoabc<= "101";
else
case counter is
when "000"=>oabc<= "101";
when "001"=>oabc<= "100";
when "010"=>oabc<= "110";
when "011"=>oabc<= "010";
when "100"=>oabc<= "011";
when "101"=>oabc<= "001";
when others=>null;
end case;
end if;
end process;

end bhv;

说明：这里按照输入时钟为1.8KHz设计的，需要用锁相环生成1.8KHz时钟提供给这个模块

同样期待中！