FPGA Design Engineer-阿尔卡特朗讯中国区(上海贝尔股份有限公司)
职位描述
RESPOSIBILITY
1.Responsible for FPGA logic design, debug, maintenance, etc.
2.Work together with cross-function teams(hardware, software, system, product management) to ensure overall system requirement fulfilled with cost-effective approach and high quality
3.Generate engineering design/test documentations.
Qualifications:
1.More than 5 years high speed FPGA design experiences
2.Experiences with various FPGA design tools
3.Knowledge of electrical circuits
4.Be able to co-ordinate tasks among different teams
5.Excellent English written and verbal communication skill
6.Open-minded, good team work spirit
7.Self motivated, ability to work independently with minimal supervision
8.Strong learning desire and good self-study ability
应聘以上岗位,请将中英文简历发送至邮箱:Xianting.Xia@alcatel-sbell.com.cn,邮件标题格式请按“姓名+应聘岗位”填写。
联系方式
电子邮箱: xianting.xia@alcatel-sbell.com.cn |