发布日期: 2010-07-19 工作地点: 深圳 招聘人数: 1
工作年限: 三年以上 语言要求: 英语 熟练 学 历: 本科
职位描述
Requirement:
- Bachelor degree with major in computer or automation;
- At least 3 years work experience of simulate circuit and digital circuit and FPGA with Verilog;
- Knowledge in C51,ARM and C programming ;
- Knowledge in design process , risk ,control plan ;
- Good English skills
Responsibility:
1:design simulate circuit
2:programming FPGA to gather data
3:hrdware debug, concert firmware debug |