求教！小弟用quartus写的verilog程序为什么提示这样的错误啊？

Error: Run Analysis and Synthesis (quartus_map) with top-level entity name "count128" or run I/O Assignment Analysis before running the EDA Netlist Writer (quartus_eda)
Error: Quartus II 64-Bit EDA Netlist Writer was unsuccessful. 1 error, 0 warnings
        Error: Peak virtual memory: 243 megabytes
        Error: Processing ended: Tue Feb 26 17:31:28 2013
        Error: Elapsed time: 00:00:00
        Error: Total CPU time (on all processors): 00:00:00