中星微电子-IC设计,IC验证工程师
第一个:IC设计工程师/高级工程师:
1. Responsible for digital logic synthesis, STA and formal verification.
2. Responsible to optimize digital FrontEnd Flow.
Qualification:
1.Proficiency in logic synthesis, STA and formal verification.
2.Experience with DesignCompiler, PrimeTime and Formality.
3.Proficiency in Verilog language.
4.Proficiency in TCL.
5.Experience with logic design and simulation.
6.Experience with DFT is a plus.
7.Experience with 90nm or 65nm process is a plus.
8.Good knowledge of low power SOC design is a plus.
9.At least two chip sign-off experience.
10.Good team work and communication.
薪水范围:12K~15K
第二个:IC Verification Engineer/IC验证工程师,高级工程师
General Description
This position is responsible for creation of test case, development of verification environments and execution of verification plans. Debug and management of pre/post regression simulation is also required.
Qualification
1、Minimum 2 years’ industry experience, including successful completion of silicon verification projects of multi-million gate ASICs.
2、Strong Verilog and System Verilog coding experience. Experience with c/c++/per is a plus.
3、Domain expertise in multimedia applications, algorithms, or know-hows for example h.264/mpeg4/avs/audio PCM is a plus.
4、Experienced in function verification for large, complex soc project include SDRC/USB/PMU/TPI etc..
5、Working knowledge of the state of art verification methodologies and tools in the industry.
6、Strong verbal communication and interpersonal skills to work closely with a variety of individual contributors and managers.
薪水范围:12K~15K
联系方式:huangkaiyan@vimicro.com
Base:北京 |