大侠求助，万急！！！！
library ieee;use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity sram_fifo is
port(
clk:in std_logic;
clr:in std_logic;
datain:in std_logic_vector(15 downto 0);
sh:in std_logic;
wr_clk:in std_logic;--be equal to dataclk
--USB signal
start:in std_logic;
flag_full:in std_logic;
u_ifclk:out std_logic;
u_addr1:out std_logic;
u_addr0:out std_logic;
slwr:out std_logic;
dataout:out std_logic_vector(15 downto 0);
SLRD:OUT STD_LOGIC;
--led
led0:out std_logic;
led1:out std_logic;
led2:out std_logic;
led3:out std_logic;
--sram:is61lv51216 signal
sram_addr:out std_logic_vector(17 downto 0);
sram_data:inout std_logic_vector(15 downto 0);
sram_ub:out std_logic;
sram_lb:out std_logic;
oe:out std_logic;--low valid
we:out std_logic;--low valid
ce:out std_logic--low valid
);
end entity;
architecture behav of sram_fifo is
signal sh_en:std_logic;
type states is(idle,wr_begin,wr_on,wr,wr_end,rd_begin,rd_on,rd,rd_end);
signal current_state:states;
signal sram_addr_s:std_logic_vector(17 downto 0);
SIGNAL SRAM_DATA_FIFO:STD_LOGIC_VECTOR(15 downto 0);
signal usb_data_fifo:std_logic_vector(15 downto 0);
signal wr_flag:std_logic;
signal rd_flag:std_logic;
begin
--read 7680 values per frame:sh_en :enable
a0:
process(wr_clk,sh)
variable cnt1:integer range 0 to 7681:=0;
begin
if(sh='0')then
if(wr_clk'event and wr_clk='1')then
if(cnt1=7681)then
cnt1:=cnt1;
else cnt1:=cnt1+1;
if(cnt1<=7680)then
sh_en<='0';
else
sh_en<='1';
end if;
end if;
end if;
else
cnt1:=0;
sh_en<='1';
end if;
end process a0;
--write and read respectively
a1:
process(clk,start)
begin
if(clk'event and clk='1')then
if(clr='1')then
oe<='1';
we<='1';
sram_addr_s<="000000000000000000";
wr_flag<='0';
rd_flag<='0';
u_addr1<='0';
u_addr0<='0';
slwr<='1';
led0<='0';
led1<='0';
led2<='0';
led3<='0';
--cnt2:=0;
current_state<=idle;
else
case current_state is
when idle=> wr_flag<='0';
rd_flag<='0';
LED0<='0';
led1<='0';
led2<='0';
led3<='0';
oe<='1';
we<='1';
sram_addr_s<="000000000000000000";地址从1开始写的，没用地址0.
u_addr1<='0';
u_addr0<='0';
slwr<='1';
if(start='1')then
current_state<=wr_begin;
else
current_state<=idle;
end if;
when wr_begin=>wr_flag<='1';
if(sh_en='0')then
current_state<=wr_on;
else
current_state<=wr_begin;
end if;
when wr_on=> if(sh_en='0')then
sram_addr_s<=sram_addr_s+'1';
SRAM_DATA_FIFO<=datain;
we<='1';
oe<='0';
current_state<=wr;
else
current_state<=wr_begin;
end if;
when wr => if(sram_addr_s/="100101100000000000")then
we<='0';
oe<='0';
current_state<=wr_on;
else
led0<='1';
we<='1';
oe<='1';
wr_flag<='0';
current_state<=wr_end;
end if;
when wr_end=> wr_flag<='0';
sram_addr_s<="000000000000000000";
current_state<=rd_begin;
led2<='1';
when rd_begin=> u_addr1<='1';
u_addr0<='0';
oe<='0';
we<='1';
wr_flag<='0';
rd_flag<='1';
sram_addr_s<=sram_addr_s+'1';
current_state<=rd_on;
when rd_on => if(flag_full='1')then
slwr<='0';
dataout<=usb_data_fifo;
current_state<=rd;
else
slwr<='1';
current_state<=rd_on;
end if;
when rd => --slwr<='1';
if(sram_addr_s/="100101100000000000")then
sram_addr_s<=sram_addr_s+'1';
oe<='0';
we<='1';
led3<='1';
current_state<=rd_on;
else
--SLWR<='1';
sram_addr_s<="000000000000000000";
oe<='1';
we<='1';
led1<='1';
rd_flag<='0';
current_state<=rd_end;
end if;
when rd_end=> slwr<='1';
wr_flag<='0';
rd_flag<='0';
if(start='0')then
current_state<=idle;
else
current_state<=rd_end;
end if;
when others=> current_state<=idle;
end case;
end if;
end if;
end process;
sram_data<=SRAM_DATA_FIFO when (wr_flag='1' and rd_flag='0') else (others=>'Z');
usb_data_fifo<=sram_data when (rd_flag='1' and wr_flag='0') else (others=>'0');
sram_addr<=sram_addr_s;
ce<='1';
SLRD<='1';
u_ifclk<=wr_clk;
--oe<='0';
sram_ub<='0';
sram_lb<='0';
end behav;
这是我用FPGA控制SRAM读写，然后传给USB（68013a），我想问一下我的程序哪里出错了，为什么读不出数来呢，从USB上读出来的都是FF.
start来自USB，FPGA接收到后就开始写SRAM,写到指定书目后即153600个数据后，停止写，开始读数，并给USB传输。SH_EN是一帧数据中的有用信号标志。低电平说明是信号有效。求大侠们帮忙呀！小弟在此谢过了...... 我检查了一下，CE管脚忘记置低电平了，此外再把程序中如下改一下就好了
when wr_on=> if(sh_en='0')then
sram_addr_s<=sram_addr_s+'1';
SRAM_DATA_FIFO<=datain;
we<='0';
oe<='1';
current_state<=wr;
else
current_state<=wr_begin;
end if;
when wr => if(sram_addr_s/="100101100000000000")then
we<='1';
oe<='1';
current_state<=wr_on;
else
led0<='1';
we<='1';
oe<='1';
wr_flag<='0';
current_state<=wr_end;
end if;
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