ICE 发表于 2010-6-27 23:32:17

fpga新人求计数器的Verilog程序

本帖最后由 fpgaw 于 2010-6-29 05:04 编辑

fpga新人求计数器的Verilog程序
有关于计数器设计的资料或是源代码，要可以综合，仿真的，谢谢

CCIE 发表于 2010-6-28 00:16:39

不是吧？<br>
刚学啊？<br>
不难啊

VVIC 发表于 2010-6-28 01:26:03

刚开始学习<br>
主要是看一下标准的规范，以及要注意的事情

inter 发表于 2010-6-28 02:19:18

自己搜索一下

VVIC 发表于 2010-6-28 02:50:30

网上很多代码的

VVIC 发表于 2010-6-28 03:30:56

哦<br>
谢啦

CHAN 发表于 2010-6-28 03:35:37

很多书里面都有，不难吧！

AAT 发表于 2010-6-28 05:21:36

module count6(clk,reset,ena,out,cout);<br>
&nbsp;&nbsp;input&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;clk,reset,ena;<br>
&nbsp;&nbsp;output&nbsp; &nbsp;out; <br>
&nbsp;&nbsp;output&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;out;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
<br>
always @(posedge clk or posedge reset)<br>
&nbsp; &nbsp; begin<br>
&nbsp; &nbsp;&nbsp; &nbsp; if(reset)&nbsp; &nbsp;out='b0000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else if(ena)<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; begin<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out&lt;'b0101)&nbsp;&nbsp;out=out+1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; else&nbsp;&nbsp;out='b0000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; end<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out==5)out='b1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else&nbsp;&nbsp;cout='b0;<br>
&nbsp; &nbsp; end<br>
endmodule

CHAN 发表于 2010-6-28 06:05:05

module count6(clk,reset,ena,out,cout);<br>
&nbsp;&nbsp;input&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;clk,reset,ena;<br>
&nbsp;&nbsp;output&nbsp; &nbsp;out; <br>
&nbsp;&nbsp;output&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;out;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
<br>
always @(posedge clk or posedge reset)<br>
&nbsp; &nbsp; begin<br>
&nbsp; &nbsp;&nbsp; &nbsp; if(reset)&nbsp; &nbsp;out='b0000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else if(ena)<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; begin<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out&lt;'b0101)&nbsp;&nbsp;out=out+1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; else&nbsp;&nbsp;out='b0000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; end<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out==5)out='b1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else&nbsp;&nbsp;cout='b0;<br>
&nbsp; &nbsp; end<br>
endmodule<br>
这个程序好象有问题 可我找不到问题在哪 反正就是不能编译高手　指点指点啊

HANG 发表于 2010-6-28 07:38:21

我修改了一下：<br>
module count6(clk,reset,ena,out,cout);<br>
&nbsp;&nbsp;input&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;clk,reset,ena;<br>
&nbsp;&nbsp;output&nbsp; &nbsp;out; <br>
&nbsp;&nbsp;output&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp;out;<br>
&nbsp;&nbsp;reg&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;cout;<br>
<br>
always @(posedge clk or posedge reset)<br>
&nbsp; &nbsp; begin<br>
&nbsp; &nbsp;&nbsp; &nbsp; if(reset)&nbsp; &nbsp;out='b000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else if(ena)<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;begin<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out&lt;'b101)&nbsp;&nbsp;out=out+1;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; else&nbsp;&nbsp;out='b000;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; <br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; if(out==5) cout='b1;//您的out=1无意义<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;else&nbsp;&nbsp;cout='b0;<br>
&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; &nbsp; end<br>
&nbsp; &nbsp; end<br>
endmodule
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