夏老师书上的状态机例子仿真没有输出，请高手指点。
本帖最后由 huangyijunok 于 2010-12-16 22:46 编辑主程序：
module writing ( reset,clk,address,data,sda,ack ) ;
input reset ,clk ;
input address,data ;
inout sda,ack;
reg link_write ;
reg state ;
reg sh8out_state;
reg sh8out_buf ;
reg finish_F;
reg ack;
parameter
idle = 0 , addr_write = 1 ,data_write = 2 , stop_ack = 3 ;
parameter
bit0 = 1 , bit1 = 2 ,bit2 = 3 ,bit3 = 4 ,bit4 = 5 ,bit5 = 6 ,bit6 = 7 ,bit7 = 8 ;
assign sda = link_write ? sh8out_buf:1'bz;
always @ ( posedge clk )
begin
if( !reset )
begin
link_write <= 0 ;
state <= idle ;
finish_F <= 0 ;
sh8out_state <= idle ;
ack <= 0 ;
sh8out_buf <= 0 ;
end
else
case ( state )
idle :
begin
link_write<= 0 ;
finish_F <=0 ;
sh8out_state <= idle ;
ack <= 0 ;
sh8out_buf <= address ;
state <= addr_write ;
end
addr_write:
begin
if ( finish_F == 0 )
begin shift8_out ;
end
else
begin
sh8out_state <= idle ;
sh8out_buf <= data ;
state <= data_write ;
finish_F <= 0 ;
end
end
data_write:
begin
if(finish_F == 0)
begin
shift8_out ;
end
else
begin
link_write <= 0 ;
state <= stop_ack ;
finish_F <= 0 ;
ack <= 1 ;
end
end
stop_ack:
begin
ack <= 0 ;
state <= idle ;
end
endcase
end
task shift8_out ;
begin
case ( sh8out_state )
idle :
begin
link_write <= 1 ;
sh8out_state <= bit7 ;
end
bit7:
begin
link_write <= 1 ;
sh8out_state <=bit6 ;
sh8out_buf <= sh8out_buf << 1 ;
end
bit6:
begin
sh8out_state <= bit5;
sh8out_buf <= sh8out_buf << 1 ;
end
bit5:
begin
sh8out_state <=bit4;
sh8out_buf <= sh8out_buf << 1 ;
end
bit4:
begin
sh8out_state <=bit3;
sh8out_buf <= sh8out_buf << 1 ;
end
bit3:
begin
sh8out_state <=bit2;
sh8out_buf <= sh8out_buf << 1 ;
end
bit2:
begin
sh8out_state <=bit1;
sh8out_buf <= sh8out_buf << 1 ;
end
bit1:
begin
sh8out_state <=bit0;
sh8out_buf <= sh8out_buf << 1 ;
end
bit0:
begin
link_write <= 0 ;
finish_F <= 1 ;
end
endcase
end
endtask
endmodule
测试程序：
`timescale 1 ps/ 1 ps
`define clk_cycle 50
module writing_vlg_tst();
reg address;
reg clk;
reg data;
reg reset;
// wires
wire ack;
wire sda;
assign #`clk_cycle clk = ~clk ;
writing i1 (
// port map - connection between master ports and signals/registers
.ack(ack),
.address(address),
.clk(clk),
.data(data),
.reset(reset),
.sda(sda)
);
initial
begin
clk = 0 ;
reset = 1 ;
data = 0 ;
address = 0 ;
#( 2*`clk_cycle ) reset = 0 ;
#( 2*`clk_cycle ) reset = 1 ;
#( 100*`clk_cycle ) $stop ;
end
always@ ( posedge ack )
begin
data = data + 1 ;
address = address + 1 ;
end
endmodule
编译后产生的警告：
Warning: The following nodes have both tri-state and non-tri-state drivers
Warning: Inserted always-enabled tri-state buffer between "ack" and its non-tri-state driver.
Warning: TRI or OPNDRN buffers permanently enabled
Warning: Node "ack~synth"
Warning: No exact pin location assignment(s) for 20 pins of 20 total pins
Info: Pin sda not assigned to an exact location on the device
Info: Pin ack not assigned to an exact location on the device
Info: Pin clk not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin reset not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Info: Pin data not assigned to an exact location on the device
Info: Pin address not assigned to an exact location on the device
Warning: Found 2 output pins without output pin load capacitance assignment
Info: Pin "sda" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Pin "ack" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Warning: Following 1 pins have no output enable or a GND or VCC output enable - later changes to this connectivity may change fitting results
Info: Pin ack has a permanently enabled output enable
Warning: Found pins functioning as undefined clocks and/or memory enables
Info: Assuming node "clk" is an undefined clock 这应该是I2C读写程序吧？我之前也写过一个，用了好长时间啊，主要还是时序的问题。 I2C 最好用自己的思想做出来 前天搞了一天调试不出来，不知道书上的仿真图是怎么搞出来的（源程序是照着书上抄的），现在每天都在学习当中，希望到学到一定阶段这问题可以迎刃而解。望各位前辈多多指点，多谢！
补充一下：大家有没有用IIC对不同型号的的EEPROM进行页写和页读操作的经验，能否分享一下？
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